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IC3
2009
14 years 9 months ago
Multi-scale Modeling and Analysis of Nano-RFID Systems on HPC Setup
In this paper we have worked out on some the complex modeling aspects such as Multi Scale modeling, MATLAB Sugar based modeling and have shown the complexities involved in the anal...
Rohit Pathak, Satyadhar Joshi
FDL
2005
IEEE
15 years 5 months ago
Automatic synthesis of the Hardware/Software Interface
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...
Francesco Regazzoni, André C. Nácul,...
NOCS
2007
IEEE
15 years 6 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
IPPS
2006
IEEE
15 years 5 months ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...
LCTRTS
2007
Springer
15 years 6 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...