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GLVLSI
2005
IEEE
97views VLSI» more  GLVLSI 2005»
15 years 7 months ago
On equivalence checking and logic synthesis of circuits with a common specification
In this paper we develop a theory of equivalence checking (EC) and logic synthesis of circuits with a common specification (CS). We show that two combinational circuits N1, N2 have...
Eugene Goldberg
IPPS
2005
IEEE
15 years 7 months ago
A Compiler and Runtime Infrastructure for Automatic Program Distribution
This paper presents the design and the implementation of a compiler and runtime infrastructure for automatic program distribution. We are building a research infrastructure that e...
Roxana Diaconescu, Lei Wang, Zachary Mouri, Matt C...
CODES
1996
IEEE
15 years 5 months ago
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems
Performance modeling and evaluation of embedded hardware/software systems is important to help the CoDesign process. The hardware/software partitioning needs to be evaluated befor...
Jean Paul Calvez, Dominique Heller, Olivier Pasqui...
FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
15 years 5 months ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
15 years 8 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar