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» Power-Driven Design Partitioning
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ICCAD
2007
IEEE
144views Hardware» more  ICCAD 2007»
15 years 10 months ago
Voltage island-driven floorplanning
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
Qiang Ma, Evangeline F. Y. Young
99
Voted
GECCO
2003
Springer
132views Optimization» more  GECCO 2003»
15 years 6 months ago
Circuit Bipartitioning Using Genetic Algorithm
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...
Jong-Pil Kim, Byung Ro Moon
IEEEPACT
2002
IEEE
15 years 6 months ago
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
Gautham K. Dorai, Donald Yeung
IMR
1999
Springer
15 years 5 months ago
Parallel Advancing Front Grid Generation
The primary focus of this project is to design and implement a parallel framework for an unstructured mesh generator based on the advancing front method (AFM). In particular, we t...
Rainald Löhner, Juan R. Cebral
CASES
2007
ACM
15 years 5 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov