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» Power-Efficient DRAM Speculation
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HPCA
2008
IEEE
15 years 10 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
MICRO
2008
IEEE
194views Hardware» more  MICRO 2008»
15 years 4 months ago
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gor...
ICCD
2007
IEEE
150views Hardware» more  ICCD 2007»
15 years 1 months ago
CAP: Criticality analysis for power-efficient speculative multithreading
While Speculative Multithreading (SM) on a Chip Multiprocessor (CMP) has the ability to speed-up hard-toparallelize applications, the power inefficiency of aggressive speculation ...
James Tuck, Wei Liu, Josep Torrellas
69
Voted
ARVLSI
1997
IEEE
105views VLSI» more  ARVLSI 1997»
15 years 1 months ago
An Embedded DRAM for CMOS ASICs
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
John Poulton
SIGMETRICS
2008
ACM
179views Hardware» more  SIGMETRICS 2008»
14 years 9 months ago
Software thermal management of dram memory for multicore systems
Thermal management of DRAM memory has become a critical issue for server systems. We have done, to our best knowledge, the first study of software thermal management for memory su...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Go...