Sciweavers

13 search results - page 2 / 3
» Power-aware FPGA logic synthesis using binary decision diagr...
Sort
View
DAC
2009
ACM
14 years 7 months ago
BDD-based synthesis of reversible logic for large functions
Reversible logic is the basis for several emerging technologies such as quantum computing, optical computing, or DNA computing and has further applications in domains like low-pow...
Robert Wille, Rolf Drechsler
MST
2006
120views more  MST 2006»
13 years 6 months ago
Exploiting Regularities for Boolean Function Synthesis
The "regularity" of a Boolean function can be exploited for decreasing its minimization time. It has already been shown that the notion of autosymmetry is a valid measure...
Anna Bernasconi, Valentina Ciriani, Fabrizio Lucci...
ENTCS
2007
130views more  ENTCS 2007»
13 years 6 months ago
Specify, Compile, Run: Hardware from PSL
We propose to use a formal specification language as a high-level hardware description language. Formal languages allow for compact, unambiguous representations and yield designs...
Roderick Bloem, Stefan Galler, Barbara Jobstmann, ...
ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
13 years 10 months ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
CAV
2010
Springer
172views Hardware» more  CAV 2010»
13 years 10 months ago
Symbolic Bounded Synthesis
Abstract. Synthesis of finite state systems from full linear time temporal logic (LTL) specifications is gaining more and more attention as several recent achievements have signi...
Rüdiger Ehlers