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MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
15 years 6 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
ICCAD
1999
IEEE
181views Hardware» more  ICCAD 1999»
15 years 4 months ago
A new heuristic for rectilinear Steiner trees
The minimum rectilinear Steiner tree (RST) problem is one of the fundamental problems in the field of electronic design automation. The problem is NP-hard, and much work has been ...
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganle...
ISMIS
2009
Springer
15 years 6 months ago
GIS-FLSolution: A Spatial Analysis Platform for Static and Transportation Facility Location Allocation Problem
Static and transportation facility location allocation problem is a new problem in facility location research. It aims to find out optimal locations of static and transportation fa...
Wei Gu, Xin Wang, Liqiang Geng
SIPS
2007
IEEE
15 years 6 months ago
An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gros...
GLOBECOM
2007
IEEE
15 years 6 months ago
Performing Packet Content Inspection by Longest Prefix Matching Technology
—This article presents a novel mechanism to perform packet content inspection by longest prefix matching (LPM) technology. It is done by transforming the automaton-based state ta...
Nen-Fu Huang, Yen-Ming Chu, Yen-Min Wu, Chia-Wen H...