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LCTRTS
2007
Springer
15 years 9 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
OOPSLA
2007
Springer
15 years 9 months ago
Statistically rigorous java performance evaluation
Java performance is far from being trivial to benchmark because it is affected by various factors such as the Java application, its input, the virtual machine, the garbage collect...
Andy Georges, Dries Buytaert, Lieven Eeckhout
94
Voted
CGO
2006
IEEE
15 years 9 months ago
Compiling for EDGE Architectures
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
Aaron Smith, Jon Gibson, Bertrand A. Maher, Nichol...
CODES
2006
IEEE
15 years 9 months ago
Methodology for attack on a Java-based PDA
Although mobile Java code is frequently executed on many wireless devices, the susceptibility to electromagnetic (EM) attacks is largely unknown. If analysis of EM waves emanating...
Catherine H. Gebotys, Brian A. White
133
Voted
IUI
2006
ACM
15 years 9 months ago
Automatic prediction of misconceptions in multilingual computer-mediated communication
Multilingual communities using machine translation to overcome language barriers are showing up with increasing frequency. However, when a large number of translation errors get m...
Naomi Yamashita, Toru Ishida
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