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CHARME
2003
Springer
73views Hardware» more  CHARME 2003»
15 years 3 months ago
Towards Diagrammability and Efficiency in Event Sequence Languages
Industrial verification teams are actively developing suitable event sequence languages for hardware verification. Such languages must be expressive, designer friendly, and hardwar...
Kathi Fisler
LICS
2007
IEEE
15 years 5 months ago
A Robust Class of Context-Sensitive Languages
We define a new class of languages defined by multi-stack automata that forms a robust subclass of context-sensitive languages, with decidable emptiness and closure under boolea...
Salvatore La Torre, Parthasarathy Madhusudan, Genn...
EMSOFT
2006
Springer
15 years 3 months ago
A timing model for synchronous language implementations in simulink
We describe a simple scheme for mapping synchronous language models, in the form of Boolean Mealy Machines, into timed automata. The mapping captures certain idealized implementat...
Timothy Bourke, Arcot Sowmya
CORR
2007
Springer
79views Education» more  CORR 2007»
14 years 11 months ago
Logic Meets Algebra: the Case of Regular Languages
The study of finite automata and regular languages is a privileged meeting point of algebra and logic. Since the work of Büchi, regular languages have been classified according ...
Pascal Tesson, Denis Thérien
DLOG
2003
15 years 26 days ago
Reasoning about Nominals with FaCT and RACER
We present a translation of looping alternating two-way automata into a comparably inexpressive description logic, which is contained in SHIQ. This enables us to perform the empti...
Jan Hladik