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» Predictable Code and Data Paging for Real Time Systems
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NSDI
2004
14 years 10 months ago
Designing a DHT for Low Latency and High Throughput
Designing a wide-area distributed hash table (DHT) that provides high-throughput and low-latency network storage is a challenge. Existing systems have explored a range of solution...
Frank Dabek, Jinyang Li, Emil Sit, James Robertson...
ASPLOS
2006
ACM
15 years 3 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
84
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IUI
2009
ACM
15 years 4 months ago
Discovering frequent work procedures from resource connections
Intelligent desktop assistants could provide more help for users if they could learn models of the users’ workflows. However, discovering desktop workflows is difficult becau...
Jianqiang Shen, Erin Fitzhenry, Thomas G. Dietteri...
SIGMETRICS
2008
ACM
175views Hardware» more  SIGMETRICS 2008»
14 years 9 months ago
DARC: dynamic analysis of root causes of latency distributions
OSprof is a versatile, portable, and efficient profiling methodology based on the analysis of latency distributions. Although OSprof has offers several unique benefits and has bee...
Avishay Traeger, Ivan Deras, Erez Zadok
ASPLOS
2009
ACM
15 years 1 months ago
Efficient online validation with delta execution
Software systems are constantly changing. Patches to fix bugs and patches to add features are all too common. Every change risks breaking a previously working system. Hence admini...
Joseph Tucek, Weiwei Xiong, Yuanyuan Zhou