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SBACPAD
2007
IEEE
129views Hardware» more  SBACPAD 2007»
15 years 10 months ago
Predicting Loop Termination to Boost Speculative Thread-Level Parallelism in Embedded Applications
The necessity of devising novel thread-level speculation (TLS) techniques has become extremely important with the growing acceptance of multi-core architectures by the industry. H...
Md. Mafijul Islam
136
Voted
ASPLOS
2008
ACM
15 years 5 months ago
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...
M. Aater Suleman, Moinuddin K. Qureshi, Yale N. Pa...
136
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VMCAI
2004
Springer
15 years 9 months ago
Applying Jlint to Space Exploration Software
Abstract. Java is a very successful programming language which is also becoming widespread in embedded systems, where software correctness is critical. Jlint is a simple but highly...
Cyrille Artho, Klaus Havelund
WMPI
2004
ACM
15 years 9 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
157
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RTAS
2010
IEEE
15 years 2 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean