142 search results - page 11 / 29 » Predictable programming on a precision timed architecture |
71
Voted
MICRO
2007
IEEE
15 years 3 months ago
2007
IEEE
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
ARITH
1999
IEEE
15 years 1 months ago
1999
IEEE
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
89
Voted
SAMOS
2007
Springer
15 years 3 months ago
2007
Springer
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
56
Voted
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
Most programs are repetitive, where similar behavior can be seen at different execution times. Proposed on-line systems automatically group these similar intervals of execution in...
FPL
2009
Springer
15 years 2 months ago
2009
Springer
As FPGA devices become larger, more coarse-grain modules coupled with large scale reconfigurable fabric become available, thus enabling new classes of applications to run effici...