142 search results - page 14 / 29 » Predictable programming on a precision timed architecture |
CASES
2006
ACM
15 years 1 months ago
2006
ACM
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
DAC
2009
ACM
15 years 10 months ago
2009
ACM
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
ASPLOS
2012
ACM
13 years 5 months ago
2012
ACM
Numerous data center services exhibit low average utilization leading to poor energy efficiency. Although CPU voltage and frequency scaling historically has been an effective mea...
87
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SAS
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
104
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RTSS
2003
IEEE
15 years 2 months ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...