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SAMOS
2005
Springer
15 years 10 months ago
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context
The performance and area of a System-on-Chip depend on the utilized communication method. This paper presents simulation-based comparison of generic, synthesizable single bus, hie...
Erno Salminen, Tero Kangas, Jouni Riihimäki, ...
ICIP
2004
IEEE
16 years 6 months ago
Rate-distortion analysis of random access for compressed light fields
Image-based rendering data sets, such as light fields, require efficient compression due to their large data size, but also easy random access when rendering from the data set. Ef...
Prashant Ramanathan, Bernd Girod
BMCBI
2006
121views more  BMCBI 2006»
15 years 4 months ago
Splice site identification using probabilistic parameters and SVM classification
Background: Recent advances and automation in DNA sequencing technology has created a vast amount of DNA sequence data. This increasing growth of sequence data demands better and ...
A. K. M. A. Baten, Bill C. H. Chang, Saman K. Halg...
ICCD
2005
IEEE
108views Hardware» more  ICCD 2005»
16 years 1 months ago
Methods for Modeling Resource Contention on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Danie...
WOSP
2010
ACM
15 years 11 months ago
Analytical modeling of lock-based concurrency control with arbitrary transaction data access patterns
Nowadays the 2-Phase-Locking (2PL) concurrency control algorithm still plays a core rule in the construction of transactional systems (e.g. database systems and transactional memo...
Pierangelo di Sanzo, Roberto Palmieri, Bruno Cicia...