Sciweavers

598 search results - page 8 / 120
» Predicting Lattice Reduction
Sort
View
108
Voted
ISCAS
2007
IEEE
93views Hardware» more  ISCAS 2007»
15 years 7 months ago
VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding
Abstract— This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR scheme...
Andreas Burg, Dominik Seethaler, Gerald Matz
ICC
2009
IEEE
145views Communications» more  ICC 2009»
15 years 7 months ago
Rapid Prototyping of Clarkson's Lattice Reduction for MIMO Detection
—This paper presents the field-programmable gate array (FPGA) implementation of a variant of the LenstraLenstra-Lov´asz (LLL) lattice reduction (LR) algorithm, known as the Cla...
Luis G. Barbero, David L. Milliner, Tharmalingam R...
76
Voted
ICC
2007
IEEE
133views Communications» more  ICC 2007»
15 years 7 months ago
On Generating Soft Outputs for Lattice-Reduction-Aided MIMO Detection
— Lattice Reduction (LR) aided MIMO detection has been shown to provide near-optimal hard outputs. However soft outputs are required in practical systems to fully exploit gains f...
Vishakan Ponnampalam, Darren McNamara, Andy Lillie...
ICASSP
2011
IEEE
14 years 4 months ago
Latency-constrained low-complexity lattice reduction for MIMO-OFDM systems
Recent studies have investigated lattice-reduction (LR) preprocessing technique for multiple-inputmultiple-output (MIMO) detection. However, if LR is applied to the orthogonalfreq...
Chun-Fu Liao, Fang-Chun Lan, Yuan-Hao Huang, Po-Li...
109
Voted
LATINCRYPT
2010
14 years 11 months ago
Accelerating Lattice Reduction with FPGAs
We describe an FPGA accelerator for the Kannan–Fincke– Pohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementati...
Jérémie Detrey, Guillaume Hanrot, Xa...