Abstract— This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR scheme...
—This paper presents the field-programmable gate array (FPGA) implementation of a variant of the LenstraLenstra-Lov´asz (LLL) lattice reduction (LR) algorithm, known as the Cla...
Luis G. Barbero, David L. Milliner, Tharmalingam R...
— Lattice Reduction (LR) aided MIMO detection has been shown to provide near-optimal hard outputs. However soft outputs are required in practical systems to fully exploit gains f...
Vishakan Ponnampalam, Darren McNamara, Andy Lillie...
Recent studies have investigated lattice-reduction (LR) preprocessing technique for multiple-inputmultiple-output (MIMO) detection. However, if LR is applied to the orthogonalfreq...
We describe an FPGA accelerator for the Kannan–Fincke– Pohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementati...