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INFOCOM
2003
IEEE
15 years 10 months ago
User-Level Performance of Channel-Aware Scheduling Algorithms in Wireless Data Networks
— Channel-aware scheduling strategies, such as the Proportional Fair algorithm for the CDMA 1xEV-DO system, provide an effective mechanism for improving throughput performance in...
Sem C. Borst
HPCA
2003
IEEE
16 years 5 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
CIKM
2008
Springer
15 years 6 months ago
Modeling LSH for performance tuning
Although Locality-Sensitive Hashing (LSH) is a promising approach to similarity search in high-dimensional spaces, it has not been considered practical partly because its search q...
Wei Dong, Zhe Wang, William Josephson, Moses Chari...
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HPCA
2004
IEEE
16 years 5 months ago
Signature Buffer: Bridging Performance Gap between Registers and Caches
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
Lu Peng, Jih-Kwon Peir, Konrad Lai
VTC
2008
IEEE
15 years 11 months ago
Performance of Dedicated Indoor MIMO HSDPA Systems
—MIMO and higher-order modulation (64-QAM) have recently been introduced in the HSPA downlink (HSDPA) to extend peak data rates. Both techniques demand a high SINR operating poin...
Karl J. Molnar, Stephen J. Grant