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» Predicting locality phases for dynamic memory optimization
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ISCAPDCS
2003
14 years 11 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee
MICRO
2000
IEEE
61views Hardware» more  MICRO 2000»
15 years 2 months ago
Reducing wire delay penalty through value prediction
In this work we show that value prediction can be used to avoid the penalty of long wire delays by predicting the data that is communicated through these long wires and validating...
Joan-Manuel Parcerisa, Antonio González
IASTEDSEA
2004
14 years 11 months ago
Java bytecode verification with dynamic structures
Java applets run on a Virtual Machine that checks code's integrity and correctness before execution using a module called Bytecode Verifier. Java Card technology allows Java ...
Cinzia Bernardeschi, Luca Martini, Paolo Masci
MICRO
2002
IEEE
114views Hardware» more  MICRO 2002»
15 years 2 months ago
Characterizing and predicting value degree of use
A value’s degree of use—the number of dynamic uses of that value—provides the most essential information needed to optimize its communication. We present simulation results ...
J. Adam Butts, Gurindar S. Sohi
POPL
2007
ACM
15 years 10 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...