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ICS
2000
Tsinghua U.
15 years 1 months ago
Push vs. pull: data movement for linked data structures
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
Chia-Lin Yang, Alvin R. Lebeck
IISWC
2006
IEEE
15 years 3 months ago
Modeling Cache Sharing on Chip Multiprocessor Architectures
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
Pavlos Petoumenos, Georgios Keramidas, Håkan...
85
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SIGMETRICS
2004
ACM
105views Hardware» more  SIGMETRICS 2004»
15 years 3 months ago
A model of BGP routing for network engineering
The performance of IP networks depends on a wide variety of dynamic conditions. Traffic shifts, equipment failures, planned maintenance, and topology changes in other parts of th...
Nick Feamster, Jared Winick, Jennifer Rexford
SIGMETRICS
1997
ACM
111views Hardware» more  SIGMETRICS 1997»
15 years 1 months ago
Cache Behavior of Network Protocols
In this paper we present a performance study of memory reference behavior in network protocol processing, using an Internet-based protocol stack implemented in the x-kernel runnin...
Erich M. Nahum, David J. Yates, James F. Kurose, D...
COMPUTING
2007
101views more  COMPUTING 2007»
14 years 9 months ago
Reverse engineering with subdivision surfaces
Reverse engineering is concerned with the reconstruction of surfaces from three-dimensional point clouds originating from laser-scanned objects. We present an adaptive surface rec...
P. Keller, Martin Bertram, Hans Hagen