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HPCA
2000
IEEE
15 years 8 months ago
eXtended Block Cache
This paper describes a new instruction-supply mechanism, called the eXtended Block Cache (XBC). The goal of the XBC is to improve on the Trace Cache (TC) hit rate, while providing...
Stéphan Jourdan, Lihu Rappoport, Yoav Almog...
HPCA
1999
IEEE
15 years 8 months ago
A Study of Control Independence in Superscalar Processors
Control independence has been put forward as a significant new source of instruction-level parallelism for future generation processors. However, its performance potential under p...
Eric Rotenberg, Quinn Jacobson, James E. Smith
IPPS
1999
IEEE
15 years 8 months ago
A Transformational Framework for Skeletal Programs: Overview and Case Study
A structured approach to parallel programming allows to construct applications by composing skeletons, i.e., recurring patterns of task- and data-parallelism. First academic and co...
Sergei Gorlatch, Susanna Pelagatti
ICS
1999
Tsinghua U.
15 years 8 months ago
Clustered speculative multithreaded processors
In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...
Pedro Marcuello, Antonio González
ICS
1989
Tsinghua U.
15 years 7 months ago
Control flow optimization for supercomputer scalar processing
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
Pohua P. Chang, Wen-mei W. Hwu