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102
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AHS
2007
IEEE
15 years 1 months ago
2007
IEEE
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...
ASPLOS
1998
ACM
15 years 1 months ago
1998
ACM
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
IVC
2006
14 years 9 months ago
2006
While the SoftAssign algorithm imposes a two-way constraint embedded into the deterministic annealing scheme and the EMICP algorithm imposes a one-way constraint, they represent t...
IEEEPACT
2005
IEEE
15 years 3 months ago
2005
IEEE
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
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GLVLSI
1998
IEEE
15 years 1 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...