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ICS
2009
Tsinghua U.
14 years 1 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
CCECE
2006
IEEE
14 years 10 days ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
WDAG
2005
Springer
67views Algorithms» more  WDAG 2005»
13 years 11 months ago
What Can Be Implemented Anonymously?
Abstract. The vast majority of papers on distributed computing assume that processes are assigned unique identifiers before computation begins. But is this assumption necessary? W...
Rachid Guerraoui, Eric Ruppert
IEEEPACT
2002
IEEE
13 years 11 months ago
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning
This paper presents a new modulo scheduling algorithm for clustered microarchitectures. The main feature of the proposed scheme is that the assignment of instructions to clusters ...
Alex Aletà, Josep M. Codina, F. Jesú...
IEEEPACT
2002
IEEE
13 years 11 months ago
Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power
Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, ...
Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasu...