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» Prefix-Like Complexities and Computability in the Limit
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DAC
2005
ACM
15 years 11 months ago
Race-condition-aware clock skew scheduling
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...
Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu
DAC
2006
ACM
15 years 11 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
ICML
2007
IEEE
15 years 10 months ago
Graph clustering with network structure indices
Graph clustering has become ubiquitous in the study of relational data sets. We examine two simple algorithms: a new graphical adaptation of the k-medoids algorithm and the Girvan...
Matthew J. Rattigan, Marc Maier, David Jensen
ISBI
2008
IEEE
15 years 10 months ago
Advanced level-set based multiple-cell segmentation and tracking in time-lapse fluorescence microscopy images
Segmentation and tracking of cells in fluorescence microscopy image sequences is an important task in many biological studies into cell migration as well as intracellular dynamics...
Oleh Dzyubachyk, Wiro J. Niessen, Erik H. W. Meije...
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
15 years 10 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch