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IAJIT
2010
84views more  IAJIT 2010»
14 years 8 months ago
A Test Procedure for Boundary Scan Circuitry in PLDs and FPGAs
: A test procedure for testing mainly the boundary scan cells, and testing partially the test access port controller in programmable logic devices, and field programmable gate arra...
Bashar Al-Khalifa
SIGSOFT
2009
ACM
15 years 10 months ago
DebugAdvisor: a recommender system for debugging
In large software development projects, when a programmer is assigned a bug to fix, she typically spends a lot of time searching (in an ad-hoc manner) for instances from the past ...
B. Ashok, Joseph M. Joy, Hongkang Liang, Sriram K....
ICSE
2003
IEEE-ACM
15 years 10 months ago
The Vienna Component Framework Enabling Composition Across Component Models
The Vienna Component Framework (VCF) supports the interoperability and composability of components across different component models, a facility that is lacking in existing compon...
Johann Oberleitner, Thomas Gschwind, Mehdi Jazayer...
ITC
1997
IEEE
121views Hardware» more  ITC 1997»
15 years 2 months ago
BIST-Based Diagnostics of FPGA Logic Blocks
: Accurate diagnosis is an essential requirement in many testing environments, since it is the basis for any repair or replacement strategy used for chip or system fault-tolerance....
Charles E. Stroud, Eric Lee, Miron Abramovici

Book
4712views
16 years 5 months ago
Basics of Compiler Design
"A compiler translates (or compiles) a program written in a highlevel programming language that is suitable for human programmers into the low-level machine language that is...
Torben Mogensen