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DAC
1997
ACM
15 years 2 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
ARTS
1997
Springer
15 years 2 months ago
PLC-Automata: A New Class of Implementable Real-Time Automata
We introduce PLC-Automata as a new class of automata which are tailored to deal with real-time properties of Programmable Logic Controllers (PLCs). These devices are often used in...
Henning Dierks
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Approximation Algorithm for Process Mapping on Network Processor Architectures
The high performance requirements of networking applications has led to the advent of programmable network processor (NP) architectures that incorporate symmetric multiprocessing, ...
Christopher Ostler, Karam S. Chatha, Goran Konjevo...
WDAG
1995
Springer
100views Algorithms» more  WDAG 1995»
15 years 1 months ago
Universal Constructions for Large Objects
We present lock-free and wait-free universal constructions for implementing large shared objects. Most previous universal constructions require processes to copy the entire object...
James H. Anderson, Mark Moir
PPOPP
1991
ACM
15 years 1 months ago
Coarse-Grain Parallel Programming in Jade
This paper presents Jade, a language which allows a programmer to easily express dynamic coarse-grain parallelism. Starting with a sequential program, a programmer augments those ...
Monica S. Lam, Martin C. Rinard