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FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
15 years 8 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
LCPC
2001
Springer
15 years 8 months ago
Strength Reduction of Integer Division and Modulo Operations
Integer division, modulo, and remainder operations are expressive and useful operations. They are logical candidates to express complex data accesses such as the wrap-around behav...
Jeffrey Sheldon, Walter Lee, Ben Greenwald, Saman ...
ACSAC
2000
IEEE
15 years 8 months ago
Secure Smart Homes using Jini and UIUC SESAME
In this paper, we discuss our approach to constructing a dynamic and secure “Smart Home” environment and tackling the challenges associated with it. We envision a Smart Home a...
Jalal Al-Muhtadi, Manish Anand, M. Dennis Mickunas...
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AIWORC
2000
IEEE
15 years 8 months ago
A Comparison of Mobile Agent and Client-Server Paradigms for Information Retrieval Tasks in Virtual Enterprises
Abstract—In next-generation enterprises it will become increasingly important to retrieve information efficiently and rapidly from widely dispersed sites in a virtual enterprise...
Ravi Jain, Farooq Anjum, Amjad Umar
HPCA
2000
IEEE
15 years 8 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman