This paper describes a methodology for synthesizing the data-path of a Very Long Instruction Word (VLIW) based Video Signal Processor (VSP). Offering both performance and programm...
In its infancy, the World-Wide Web consisted of a web of largely static hypertext documents. As time progresses it is evolving into a domain which supports almost arbitrary network...
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
This paper introduces a new compiler optimization called with-loop-folding. It is based on a special loop construct, the withloop, which in the functional language Sac (for Single ...
This paper describes a family of high-speed Finite Impulse Response (FIR) digital filters that have been scaled across three generations of CMOS processes. The processes include c...
Lars E. Thon, Ghavam G. Shahidi, Werner Rausch, Ge...