This paper describes an approach to the implementation and the operation of a Simultaneous Multithreaded processor. We propose an architecture which integrates a software mechanism...
A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The stat...
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Since the publication of the Design Patterns book, a large number of design patterns have been identified and codified. Unfortunately, these patterns are mostly organised in an ad...
This paper describes new algorithms for systemlevel software synthesis, namely the scheduling and allocation of a set of complex tasks running at multiple rates on a heterogeneous...