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DATE
2009
IEEE
148views Hardware» more  DATE 2009»
15 years 10 months ago
A new design-for-test technique for SRAM core-cell stability faults
—Core-cell stability represents the ability of the core-cell to keep the stored data. With the rapid development of semiconductor memories, their test is becoming a major concern...
Alexandre Ney, Luigi Dilillo, Patrick Girard, Serg...
NOCS
2009
IEEE
15 years 10 months ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
IPPS
2009
IEEE
15 years 10 months ago
Exploring FPGAs for accelerating the phylogenetic likelihood function
Driven by novel biological wet lab techniques such as pyrosequencing there has been an unprecedented molecular data explosion over the last 2-3 years. The growth of biological seq...
Nikolaos Alachiotis, Euripides Sotiriades, Apostol...
ACNS
2009
Springer
123views Cryptology» more  ACNS 2009»
15 years 10 months ago
Practical Secure Evaluation of Semi-private Functions
Abstract. Two-party Secure Function Evaluation (SFE) is a very useful cryptographic tool which allows two parties to evaluate a function known to both parties on their private (sec...
Annika Paus, Ahmad-Reza Sadeghi, Thomas Schneider
ARCS
2009
Springer
15 years 10 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...