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FPGA
1998
ACM
125views FPGA» more  FPGA 1998»
15 years 2 months ago
Timing Driven Floorplanning on Programmable Hierarchical Targets
The goal of this paper is to perform a timing optimization of a circuit described by a network of cells on a target structure whose connection delays have discrete values following...
S. A. Senouci, A. Amoura, Helena Krupnova, Gabriel...
FPGA
1998
ACM
148views FPGA» more  FPGA 1998»
15 years 2 months ago
Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Ch...
GLVLSI
1997
IEEE
93views VLSI» more  GLVLSI 1997»
15 years 2 months ago
VLSI Architectures for Programmable Sorting of Analog Quantities with Multiple-Chip Support
Fabio Ancona, Giorgio Oddone, Stefano Rovetta, Gia...