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EUROPAR
1997
Springer
15 years 6 months ago
Modulo Scheduling with Cache Reuse Information
Instruction scheduling in general, and software pipelining in particular face the di cult task of scheduling operations in the presence of uncertain latencies. The largest contrib...
Chen Ding, Steve Carr, Philip H. Sweany
COMPCON
1994
IEEE
15 years 6 months ago
Desktop Batch Processing
: Today, online transaction processing applications can downsize from mainframes to microprocessors. Commodity database systems, operating systems, and hardware came of age in 1993...
Jim Gray, Chris Nyberg
129
Voted
EURODAC
1994
IEEE
211views VHDL» more  EURODAC 1994»
15 years 6 months ago
Advanced simulation and modeling techniques for hardware quality verification of digital systems
synchronisation also play a fundamental role in overall system robustness. ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Interference (EMI) issues also have to be conside...
S. Forno, Stephen Rochel
ASPLOS
1992
ACM
15 years 6 months ago
High Speed Switch Scheduling for Local Area Networks
Current technology trends make it possible to build communication networks that can support high performance distributed computing. This paper describes issues in the design of a ...
Thomas E. Anderson, Susan S. Owicki, James B. Saxe...
114
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SIGGRAPH
1994
ACM
15 years 6 months ago
Fast volume rendering using a shear-warp factorization of the viewing transformation
Several existing volume rendering algorithms operate by factoring the viewing transformation into a 3D shear parallel to the data slices, a projection to form an intermediate but ...
Philippe Lacroute, Marc Levoy
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