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ICCAD
2007
IEEE
124views Hardware» more  ICCAD 2007»
15 years 7 months ago
Timing budgeting under arbitrary process variations
Timing budgeting under process variations is an important step in a statistical optimization flow. We propose a novel formulation of the problem where budgets are statistical ins...
Ruiming Chen, Hai Zhou
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
15 years 7 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
ICCAD
2007
IEEE
96views Hardware» more  ICCAD 2007»
15 years 7 months ago
Monte-Carlo driven stochastic optimization framework for handling fabrication variability
Increasing effects of fabrication variability have inspired a growing interest in statistical techniques for design optimization. In this work, we propose a Monte-Carlo driven sto...
Vishal Khandelwal, Ankur Srivastava
ICCAD
2005
IEEE
144views Hardware» more  ICCAD 2005»
15 years 7 months ago
An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications
— In this paper we propose an exact algorithm that maximizes the sharing of partial terms in Multiple Constant Multiplication (MCM) operations. We model this problem as a Boolean...
Paulo F. Flores, José C. Monteiro, Eduardo ...
ICCAD
2004
IEEE
127views Hardware» more  ICCAD 2004»
15 years 7 months ago
A yield improvement methodology using pre- and post-silicon statistical clock scheduling
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...