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SODA
2010
ACM
231views Algorithms» more  SODA 2010»
15 years 7 months ago
Asymmetric Traveling Salesman Path and Directed Latency Problems
We study integrality gaps and approximability of two closely related problems on directed graphs. Given a set V of n nodes in an underlying asymmetric metric and two specified nod...
Zachary Friggstad, Mohammad R. Salavatipour, Zoya ...
ALT
2004
Springer
15 years 6 months ago
On Kernels, Margins, and Low-Dimensional Mappings
Kernel functions are typically viewed as providing an implicit mapping of points into a high-dimensional space, with the ability to gain much of the power of that space without inc...
Maria-Florina Balcan, Avrim Blum, Santosh Vempala
ICCD
2007
IEEE
322views Hardware» more  ICCD 2007»
15 years 6 months ago
Voltage drop reduction for on-chip power delivery considering leakage current variations
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
15 years 6 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 6 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky