2652 search results - page 492 / 531 » Privacy-preserving linear programming |
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
- Redundant via insertion and line end extension employed in the post-routing stage are two well known and highly recommended techniques to reduce yield loss due to via failure. Ho...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical planarization (CMP) to remove excess of deposited oxide and attain a planar...
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ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
ICDE
2010
IEEE
15 years 4 months ago
2010
IEEE
— To cope with bursty arrivals of high-volume data, a DSMS has to shed load while minimizing the degradation of Quality of Service (QoS). In this paper, we show that this problem...
ISPD
2010
ACM
15 years 4 months ago
2010
ACM
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...