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DAC
2009
ACM
15 years 4 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
HIPEAC
2009
Springer
15 years 4 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...
ICSE
2009
IEEE-ACM
15 years 4 months ago
MINTS: A general framework and tool for supporting test-suite minimization
Regression test suites tend to grow over time as new test cases are added to exercise new functionality or to target newly-discovered faults. When test suites become too large, th...
Hwa-You Hsu, Alessandro Orso
ISBRA
2009
Springer
15 years 4 months ago
Untangling Tanglegrams: Comparing Trees by Their Drawings
A tanglegram is a pair of trees on the same set of leaves with matching leaves in the two trees joined by an edge. Tanglegrams are widely used in biology – to compare evolutiona...
Balaji Venkatachalam, Jim Apple, Katherine St. Joh...
TACAS
2009
Springer
109views Algorithms» more  TACAS 2009»
15 years 4 months ago
TaPAS: The Talence Presburger Arithmetic Suite
TAPAS is a suite of libraries dedicated to FO (R, Z, +, ≤). The suite provides (1) the application programming interface GENEPI for this logic with encapsulations of many classic...
Jérôme Leroux, Gérald Point