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136
Voted
EURODAC
1994
IEEE
128views VHDL» more  EURODAC 1994»
15 years 9 months ago
A component selection algorithm for high-performance pipelines
The use of a realistic component library with multiple implementations of operators, results in cost ef cient designs; slow components can then be used on non-critical paths and t...
Smita Bakshi, Daniel D. Gajski
ICCAD
1994
IEEE
101views Hardware» more  ICCAD 1994»
15 years 9 months ago
A general framework for vertex orderings, with applications to netlist clustering
We present a general framework for the construction of vertex orderings for netlist clustering. Our WINDOW algorithm constructs an ordering by iteratively adding the vertex with h...
Charles J. Alpert, Andrew B. Kahng
ISSS
2000
IEEE
191views Hardware» more  ISSS 2000»
15 years 8 months ago
Conditional Scheduling for Embedded Systems using Genetic List Scheduling
One important part of a HW/SW codesign system is the scheduler which is needed in order to determine if a given HW/SW partitioning is suitable for a given application. In this pap...
Martin Grajcar
180
Voted
EURODAC
1995
IEEE
195views VHDL» more  EURODAC 1995»
15 years 8 months ago
A hardware/software partitioning algorithm for pipelined instruction set processor
This paper proposes a new method to design an optimal instruction set for pipelined ASIP development using a formal HW/SW codesign methodology. The codesign task addressed in this...
Binh Ngoc Nguyen, Masaharu Imai, Nobuyuki Hikichi
SGP
2007
15 years 7 months ago
Constraint-based fairing of surface meshes
We propose a constraint-based method for the fairing of surface meshes. The main feature of our approach is that the resulting smoothed surface remains within a prescribed distanc...
Klaus Hildebrandt, Konrad Polthier