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PPDP
2009
Springer
15 years 11 months ago
Model-checking higher-order functions
We propose a novel type-based model checking algorithm for higher-order recursion schemes. As shown by Kobayashi, verification problems of higher-order functional programs can ea...
Naoki Kobayashi
EMSOFT
2006
Springer
15 years 8 months ago
Scheduling-independent threads and exceptions in SHIM
Concurrent programming languages should be a good fit for embedded systems because they match the intrinsic parallelism of their architectures and environments. Unfortunately, typ...
Olivier Tardieu, Stephen A. Edwards
WSC
2008
15 years 7 months ago
PLCStudio: Simulation based PLC code verification
Proposed in this paper is the architecture of a PLC programming environment that enables a visual verification of PLC programs. The proposed architecture integrates a PLC program ...
Sang C. Park, Chang Mok Park, Gi-Nam Wang, Jonggeu...
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ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 1 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
CSL
2007
Springer
15 years 11 months ago
On the Complexity of Reasoning About Dynamic Policies
We study the complexity of satisfiability for DLP+ dyn , an expressive logic introduced by Demri that allows to reason about dynamic policies. DLP+ dyn extends the logic DLPdyn of...
Stefan Göller