20 search results - page 1 / 4 » Procedure Merging with Instruction Caches |
PLDI
1991
ACM
13 years 9 months ago
1991
ACM
ECRTS
2008
IEEE
14 years 22 days ago
2008
IEEE
Procedure Positioning is a well known compiler optimization aiming at the improvement of the instruction cache behavior. A contiguous mapping of procedures calling each other freq...
CASES
2010
ACM
13 years 4 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
MICRO
2002
IEEE
13 years 11 months ago
2002
IEEE
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
CASES
2004
ACM
13 years 11 months ago
2004
ACM
Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache ...