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ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
16 years 28 days ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
ICCAD
2003
IEEE
170views Hardware» more  ICCAD 2003»
16 years 28 days ago
Evaluation of Placement Techniques for DNA Probe Array Layout
DNA probe arrays have emerged as a core genomic technology that enables cost-effective gene expression monitoring, mutation detection, single nucleotide polymorphism analysis and ...
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu ...
ICCAD
2001
IEEE
192views Hardware» more  ICCAD 2001»
16 years 27 days ago
BOOM - A Heuristic Boolean Minimizer
We present a two-level Boolean minimization tool (BOOM) based on a new implicant generation paradigm. In contrast to all previous minimization methods, where the implicants are ge...
Jan Hlavicka, Petr Fiser
SOSP
2003
ACM
16 years 27 days ago
Separating agreement from execution for byzantine fault tolerant services
We describe a new architecture for Byzantine fault tolerant state machine replication that separates agreement that orders requests from execution that processes requests. This se...
Jian Yin, Jean-Philippe Martin, Arun Venkataramani...
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SOSP
2005
ACM
16 years 27 days ago
Hibernator: helping disk arrays sleep through the winter
Energy consumption has become an important issue in high-end data centers, and disk arrays are one of the largest energy consumers within them. Although several attempts have been...
Qingbo Zhu, Zhifeng Chen, Lin Tan, Yuanyuan Zhou, ...
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