Miss rate curves (MRCs) are useful in a number of contexts. In our research, online L2 cache MRCs enable us to dynamically identify optimal cache sizes when cache-partitioning a s...
David K. Tam, Reza Azimi, Livio Soares, Michael St...
Nathalie Colineau, CSIRO ? ICT Centre Locked Bag 17 North Ryde, NSW 1670 Australia nathalie.colineau@csiro.au C?cile Paris CSIRO ? ICT Centre Locked Bag 17 North Ryde, NSW 1670 Aus...
Researchers in transactional memory (TM) have proposed open nesting as a methodology for increasing the concurrency of transactional programs. The idea is to ignore "low-leve...
A method is given for constructing a max register, a linearizable, wait-free concurrent data structure that supports a write operation and a read operation that returns the larges...
In this paper, we present a Gaussian mixture model based approach to capture the spatial characteristics of any target signal in a sensor network, and further propose a temporally...