305 search results - page 42 / 61 » Process Isolation for Reconfigurable Hardware |
106
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ASAP
2009
IEEE
14 years 9 months ago
2009
IEEE
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
140
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FPL
2010
Springer
14 years 9 months ago
2010
Springer
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
SP
1999
IEEE
15 years 4 months ago
1999
IEEE
A TCB and security kernel architecture for supporting multi-threaded, queue-driven transaction processing applications in a multilevel secure environment is presented. Our design ...
ARC
2010
Springer
15 years 3 months ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
CODES
2005
IEEE
15 years 5 months ago
2005
IEEE
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...