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ICECCS
2008
IEEE
122views Hardware» more  ICECCS 2008»
15 years 7 months ago
Efficient Embedded Runtime Systems through Port Communication Optimization
Traditionally shared data areas have been used to efficiently communicate between embedded system tasks, such as periodically executing control system tasks. Such implementations ...
Peter H. Feiler
CIDM
2007
IEEE
15 years 6 months ago
Structure Prediction in Temporal Networks using Frequent Subgraphs
— There are several types of processes which can be modeled explicitly by recording the interactions between a set of actors over time. In such applications, a common objective i...
Mayank Lahiri, Tanya Y. Berger-Wolf
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 6 months ago
Timing simulation of interconnected AUTOSAR software-components
AUTOSAR is a recent specification initiative which focuses on a model-driven architecture like methodology for automotive applications. However, needed engineering steps, or how-t...
Matthias Krause, Oliver Bringmann, André He...
90
Voted
ISCA
2007
IEEE
208views Hardware» more  ISCA 2007»
15 years 6 months ago
Core fusion: accommodating software diversity in chip multiprocessors
This paper presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, ...
Engin Ipek, Meyrem Kirman, Nevin Kirman, Jos&eacut...
124
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ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
15 years 6 months ago
SAT-based ATPG for Path Delay Faults in Sequential Circuits
Due to the development of high speed circuits beyond the 2-GHz mark, the significance of automatic test pattern generation for Path Delay Faults (PDFs) drastically increased in t...
Stephan Eggersglüß, Görschwin Fey,...
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