Sciweavers

27756 search results - page 5030 / 5552
» Process Query Systems
Sort
View
138
Voted
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
16 years 13 days ago
Feature competition in a spike-based winner-take-all VLSI network
— Recurrent networks and hardware analogs that perform a winner-take-all computation have been studied extensively. This computation is rarely demonstrated in a spiking network o...
Shih-Chii Liu, Matthias Oster
ISMAR
2006
IEEE
16 years 13 days ago
Mixed reality pre-visualization and camera-work authoring in filmmaking
In this paper, we introduce the outline of “The MR-PreViz Project” performed in Japan. In the pre-production process of filmmaking, PreViz, pre-visualizing the desired scene b...
Ryosuke Ichikari, Keisuke Kawano, Asako Kimura, Fu...
145
Voted
ISORC
2006
IEEE
16 years 13 days ago
Design Patterns for Releasing Applications in C++ Implementations of JTRS Software Communications Architecture
The Software Communications Architecture (SCA), which has been adopted as an SDR (Software Defined Radio) Forum standard, provides a framework that successfully exploits common de...
Michael Barth, Jonghun Yoo, Saehwa Kim, Seongsoo H...
RTSS
2006
IEEE
16 years 12 days ago
Processor Scheduler for Multi-Service Routers
In this paper, we describe the design and evaluation of a scheduler (referred to as Everest) for allocating processors to services in high performance, multi-service routers. A sc...
Ravi Kokku, Upendra Shevade, Nishit Shah, Ajay Mah...
SIPS
2006
IEEE
16 years 12 days ago
Architecture-Aware LDPC Code Design for Software Defined Radio
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...
Yuming Zhu, Chaitali Chakrabarti
« Prev « First page 5030 / 5552 Last » Next »