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DSD
2009
IEEE
84views Hardware» more  DSD 2009»
15 years 9 months ago
Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
Ayse Kivilcim Coskun, Andrew B. Kahng, Tajana Simu...
GLVLSI
2009
IEEE
142views VLSI» more  GLVLSI 2009»
15 years 9 months ago
Hardware-accelerated gradient noise for graphics
A synthetic noise function is a key component of most computer graphics rendering systems. This pseudo-random noise function is used to create a wide variety of natural looking te...
Josef B. Spjut, Andrew E. Kensler, Erik Brunvand
RTSS
2009
IEEE
15 years 9 months ago
Coordinated Task Scheduling, Allocation and Synchronization on Multiprocessors
—Chip-multiprocessors represent a dominant new shift in the field of processor design. Better utilization of such technology in the real-time context requires coordinated approa...
Karthik Lakshmanan, Dionisio de Niz, Ragunathan Ra...
ICPP
2009
IEEE
15 years 9 months ago
Run to Potential: Sweep Coverage in Wireless Sensor Networks
—Wireless sensor networks have become a promising technology in monitoring physical world. In many applications with wireless sensor networks, it is essential to understand how w...
Min Xi, Kui Wu, Yong Qi, Jizhong Zhao, Yunhao Liu,...
INFOCOM
2009
IEEE
15 years 9 months ago
A Queueing Model Framework of PCE-Based Inter-Area Path Computation
Abstract—Path computation elements (PCE’s) are used to compute end-to-end paths across multiple areas. Multiple PCE’s may be dedicated to each area to provide sufficient path...
Juanjuan Yu, Yue He, Kai Wu, Marco Tacca, Andrea F...
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