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IPPS
2000
IEEE
15 years 8 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
IPPS
2000
IEEE
15 years 8 months ago
Controlling Distributed Shared Memory Consistency from High Level Programming Languages
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
Yvon Jégou
IPPS
2000
IEEE
15 years 8 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
ISSRE
2000
IEEE
15 years 8 months ago
Software Black Box: An Alternative Mechanism for Failure Analysis
Learning from software failures is an essential step towards the development of more reliable software systems and processes. However, as more intricate software systems are devel...
Sebastian G. Elbaum, John C. Munson
VLSID
2000
IEEE
164views VLSI» more  VLSID 2000»
15 years 8 months ago
A Fast Algorithm for Computing the Euler Number of an Image and its VLSI Implementation
Digital images are convenient media for describing and storing spatial, temporal, spectral, and physical components of information contained in a variety of domains(e.g. aerial/sa...
Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kum...
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