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120
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CCECE
2009
IEEE
15 years 10 months ago
An ultra compact block cipher for serialized architecture implementations
In this paper, we present a new block cipher, referred as PUFFIN2, that is designed to be used with applications requiring very low circuit area. PUFFIN2 is designed to be impleme...
Cheng Wang, Howard M. Heys
116
Voted
COMPSAC
2008
IEEE
15 years 10 months ago
An Adaptive Software Architecture Model Based on Component-Mismatches Detection and Elimination
Commercial-off-the-shelf components (COTS) are widely reused at present and black-box composition is the unique way to integrate them into the target system. However, various mism...
Shan Tang, Xin Peng, Yiming Lau, Wenyun Zhao, Zhix...
128
Voted
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
15 years 9 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
109
Voted
ASIACRYPT
2001
Springer
15 years 8 months ago
A Compact Rijndael Hardware Architecture with S-Box Optimization
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji M...
143
Voted
ARES
1998
Springer
15 years 8 months ago
Architecture-Centric Software Development Based on Extended Design Spaces
The realization of software projects can be significantly eased by extending the focus of reuse to architectural aspects instead of concentrating on separate software elements. Ye...
Lothar Baum, Lars Geyer, Georg Molter, Steffen Rot...