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CGO
2006
IEEE
15 years 10 months ago
A Cross-Architectural Interface for Code Cache Manipulation
Software code caches help amortize the overhead of dynamic binary transformation by enabling reuse of transformed code. Since code caches contain a potentiallyaltered copy of ever...
Kim M. Hazelwood, Robert S. Cohn
PLDI
2004
ACM
15 years 9 months ago
Vectorization for SIMD architectures with alignment constraints
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
Alexandre E. Eichenberger, Peng Wu, Kevin O'Brien
ICSE
1998
IEEE-ACM
15 years 8 months ago
Non-Intrusive Object Introspection in C++: Architecture and Application
We describe the design and implementation of system architecture to support object introspection in C++. In this system, information is collected by parsing class declarations, an...
Tyng-Ruey Chuang, Y. S. Kuo, Chien-Min Wang
CODES
2008
IEEE
15 years 10 months ago
Cache-aware optimization of BAN applications
Body-area sensor network or BAN-based health monitoring is increasingly becoming a popular alternative to traditional wired bio-monitoring techniques. However, most biomonitoring ...
Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mi...
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
16 years 29 days ago
A Minimal Dual-Core Speculative Multi-Threading Architecture
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the multiple thread contexts available in current processors. We propose a minimal SpM...
Srikanth T. Srinivasan, Haitham Akkary, Tom Holman...