2544 search results - page 133 / 509 » Process pipeline scheduling |
122
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DATE
2005
IEEE
15 years 10 months ago
2005
IEEE
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
143
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SC
2009
ACM
15 years 12 months ago
2009
ACM
Asymmetric (or Heterogeneous) Multiprocessors are becoming popular in the current era of multi-cores due to their power efficiency and potential performance and energy efficienc...
146
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INFOCOM
1997
IEEE
15 years 9 months ago
1997
IEEE
A packet scheduler in a quality-of-service QoS network should be sophisticated enough to support stringent QoS constraints at high loads, but it must also have a simple implemen...
143
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IEEEPACT
2006
IEEE
15 years 11 months ago
2006
IEEE
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
138
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ANCS
2007
ACM
15 years 9 months ago
2007
ACM
We propose a distributed congestion management scheme for non-blocking, 3-stage Clos networks, comprising plain buffered crossbar switches. VOQ requests are routed using multipath...