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134
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ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
16 years 3 months ago
An Efficient VLIW DSP Architecture for Baseband Processing
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
Tay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-...
ISPW
2007
IEEE
16 years 11 days ago
Coping with the Cone of Uncertainty: An Empirical Study of the SAIV Process Model
There is large uncertainty with the software cost in the early stages of software development due to requirement volatility, incomplete understanding of product domain, reuse oppor...
Da Yang, Barry W. Boehm, Ye Yang, Qing Wang, Mings...
160
Voted
WSC
2001
15 years 7 months ago
The use of simulation for process improvement at an ambulatory surgery center
This work has for objective building a simulation model to evaluate different alternatives of operation of a projected center for ambulatory surgery. For the construction of the m...
Francisco J. Ramis, Jorge L. Palma, Felipe F. Baes...
QRE
2011
14 years 9 months ago
Phase II monitoring of covariance stationary autocorrelated processes
papers/abstracts/authors within each session. • The Author and Session indices provide cross-reference assistance (pages 33-36). • The floor plan on page 6 shows you where tech...
Marcus B. Perry, Gary R. Mercado, Joseph J. Pignat...
SCHEDULING
2011
15 years 1 months ago
On robust online scheduling algorithms
While standard parallel machine scheduling is concerned with good assignments of jobs to machines, we aim to understand how the quality of an assignment is affected if the jobsâ€...
Michael Gatto, Peter Widmayer