2544 search results - page 26 / 509 » Process pipeline scheduling |
156
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PPOPP
2010
ACM
15 years 11 months ago
2010
ACM
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
154
Voted
IPPS
2000
IEEE
15 years 9 months ago
2000
IEEE
Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations t...
114
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CGO
2008
IEEE
15 years 11 months ago
2008
IEEE
In this paper we investigate the benefit of scheduling non-critical loads for a higher latency during software pipelining. "Noncritical" denotes those loads that have s...
178
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ASPLOS
2004
ACM
15 years 10 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
148
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CLUSTER
2007
IEEE
15 years 11 months ago
2007
IEEE
— In this paper we give a theoretical model for determining the synchronization frequency that minimizes the parallel execution time of loops with uniform dependencies dynamicall...