2544 search results - page 32 / 509 » Process pipeline scheduling |
IEEEPACT
2009
IEEE
15 years 4 months ago
2009
IEEE
Parallel programming is a requirement in the multi-core era. One of the most promising techniques to make parallel programming available for the general users is the use of parall...
TVLSI
2008
14 years 9 months ago
2008
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
JSA
2008
14 years 9 months ago
2008
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
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DAC
2012
ACM
13 years 2 days ago
2012
ACM
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
POPL
2010
ACM
15 years 7 months ago
2010
ACM
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...