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DATE
2000
IEEE
88views Hardware» more  DATE 2000»
15 years 2 months ago
Techniques for Reducing Read Latency of Core Bus Wrappers
Today’s system-on-a-chip designs consist of many cores. To enable cores to be easily integrated into different systems, many propose creating cores with their internal logic sep...
Roman L. Lysecky, Frank Vahid, Tony Givargis
IPPS
2000
IEEE
15 years 2 months ago
Deterministic Replay of Distributed Java Applications
Execution behavior of a Java application can be nondeterministic due to concurrent threads of execution, thread scheduling, and variable network delays. This nondeterminism in Jav...
Ravi B. Konuru, Harini Srinivasan, Jong-Deok Choi
DAC
1999
ACM
15 years 2 months ago
Common-Case Computation: A High-Level Technique for Power and Performance Optimization
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S...
ESA
1998
Springer
105views Algorithms» more  ESA 1998»
15 years 2 months ago
Maximizing Job Completions Online
We consider the problem of maximizingthe number of jobs completed by their deadlinein an online single processor system where the jobs are preemptable and have release times. So i...
Bala Kalyanasundaram, Kirk Pruhs
MICRO
1997
IEEE
76views Hardware» more  MICRO 1997»
15 years 2 months ago
A Framework for Balancing Control Flow and Predication
Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involve...
David I. August, Wen-mei W. Hwu, Scott A. Mahlke